Computer System Architecture

631. One last bit of control output is for control of ____________ state:

1. Minor
2. Major
3. Mixer
4. None of these

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632. Following are 4 major states for ‘load’ are:

1. Fetch
2. Decode
3. Memory
4. Write back
5. All of these

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633. Jump has 3 major states are:

1. Fetch
2. Decode
3. Complete
4. All of these

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634. ____________ state keeps track of position related to execution of an instruction:

1. Major
2. Minor
3. Both a & b
4. None of these

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635. An instruction always starts with state ____________:

1. 1
2. 2
3. 3
4. 0

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636. Decoding of an instruction in RISC architecture means decision on working of control unit for:

1. Remainder of instructions
2. Divisor of instructions
3. Dividend of instructions
4. None of these

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637. Which control is used during starting of instruction cycle:

1. Write
2. Read
3. R/W
4. None of these

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638. ____________ function select takes op code in IR translating to function of ALU and it may be compact binary code or one line per ALU:

1. ALU
2. CPU
3. Memory
4. Cache

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639. ____________ is dependent on instruction type in CU:

1. Jump
2. Branch
3. NextPC
4. All of these

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640. ____________ dependent on instruction and major state and also comes in starting of data fetch state as well as write back stage in CU:

1. Register read
2. Register write
3. Register R/W
4. All of these

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