Computer System Architecture

411. ATA stands for:

1. Advance technology attachment
2. Advance teach attachment
3. Both
4. None

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412. The memory bus is also referred as ____________:

1. Data bus
2. Address bus
3. Memory bus
4. All of these

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413. How many parts of memory bus:

1. 2
2. 3
3. 5
4. 6

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414. A three state gate defined as:

1. Analog circuit
2. Analog fundamentals
3. Both a&b
4. Digital circuit

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415. In 3 state gate two states act as signals equal to:

1. Logic 0
2. Logic 1
3. None of these
4. Both a & b

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416. In 3 state gate third position termed as high impedance state which acts as:

1. Open circuit
2. Close circuit
3. None of these
4. All of above

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417. In every transfer, selection of register by bus is decided by:

1. Control signal
2. No signal
3. All signal
4. All of above

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418. every bit of register has:

1. 2 common line
2. 3 common line
3. 1 common line
4. none of these

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419. DDR2 stands for:

1. Double data rate 2
2. Data double rate 2
3. Dynamic data rate 2
4. Dynamic double rate 2

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420. SDRAM stands for:

1. System dynamic random access memory
2. Synchronous dynamic random access memory
3. Both
4. None

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