Computer System Architecture

271. Each operation has its ____________ opcode:

1. Unique
2. Two
3. Three
4. Four

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272. which are of these examples of Intel 8086 opcodes:

1. MOV
2. ADD
3. SUB
4. All of these

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273. ____________ specify where to get the source and destination operands for the operation specified by the ____________:

1. Operand fields and opcode
2. Opcode and operand
3. Source and destination
4. Cpu and memory

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274. The source/destination of operands can be the ____________ or one of the general-purpose register:

1. Memory
2. One
3. both
4. None of these

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275. The complete set of op-codes for a particular microprocessor defines ____________ the set for that processor:

1. Code
2. Function
3. Module
4. Instruction

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276. Which is the method by which instructions are selected for execution:

1. Instruction selection
2. Selection control
3. Instruction sequencing
4. All of these

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277. The simplest method of controlling sequence of instruction execution is to have each instruction explicitly specify:

1. The address of next instruction to be run
2. Address of previous instruction
3. Both a & b
4. None of these

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278. As the instruction length increases ____________ of instruction addresses in all the instruction is ____________:

1. Implicit inclusion
2. Implicit and disadvantageous
3. Explicit and disadvantageous
4. Explicit and disadvantageous

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279. ____________ is the sequence of operations performed by CPU in processing an instruction:

1. Execute cycle
2. Fetch cycle
3. Decode
4. Instruction cycle

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280. The time required to complete one instruction is called:

1. Fetch time
2. Execution time
3. Control time
4. All of these

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