Computer Microprocessor and Assembly Language

11. Which are the architectural paradigms in microprocessor:

  1. RISC
  2. CISC
  3. PISC
  4. A and B

Correct answer: (D)
A and B

12. Which is not the main architectural feature of Power PC:

  1. It is not based on RISC
  2. Superscalar implementation
  3. Both 32 & 64 Bit
  4. Paged Memory management architecture

Correct answer: (A)
It is not based on RISC

13. Which is not the main feature of DEC Alpha:

  1. 64 Bit RISC processor
  2. Designed to replace 32 VAX(CISC)
  3. Seven stage split integer/floating point pipeline
  4. Variable Instruction length

Correct answer: (D)
Variable Instruction length

14. Which is not the open-source OS:

  1. Debian
  2. BSD Unix
  3. Gentoo & Red Hat Linux
  4. Windows

Correct answer: (D)
Windows

15. ____________ a subsystem that transfer data between computer components inside a computer or between computer:

  1. Chip
  2. Register
  3. Processor
  4. Bus

Correct answer: (D)
Bus

16. ____________ causes the address of the next microprocessor to be obtained from the memory:

  1. CRJA
  2. ROM
  3. MAP
  4. HLT

Correct answer: (C)
MAP

17. ____________ is the condition:

  1. CD
  2. IR
  3. Both a and b
  4. None of these

Correct answer: (A)
CD

18. ____________ is the most commonly used cache controller with a number of processor sets:

  1. L211 controller
  2. L210 controller
  3. L214 controller
  4. None of these

Correct answer: (B)
L210 controller

19. ____________ is the most important segment and it contains the actual assembly language instruction to be executed by the microprocessor:

  1. Data segment
  2. Code segment
  3. Stack segment
  4. Extra segment

Correct answer: (B)
Code segment

20. ____________ is usually the first level of memory access by the microprocessor:

  1. Cache memory
  2. Data memory
  3. Main memory
  4. All of these

Correct answer: (A)
Cache memory

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